View MAX1660_117073.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

19-1308; Rev 1; 10/98
L MANUA ION KIT ALUAT DATA SHEET EV WS FOLLO
Digitally Controlled Fuel-Gauge Interface
____________________________Features
o 1% Accuracy over a 600A to 4A Current Range (RSENSE = 30m) o 5V Input Offset Voltage (28V max) o SMBus 2-Wire (plus optional interrupt) Serial Interface o 2.00V Precision System Reference Output o 3.3V Linear-Regulator Output Powers External Circuitry o Two Micropower Shutdown Modes o Independent 32-Bit Charge and Discharge Coulomb Counters o Battery-Overcharge/Overdischarge Protection o Battery Short-Circuit/Overcurrent Protection o On-Board Power MOSFET Drivers o 80A Quiescent Current o <1A Shutdown Current o Small 16-Pin QSOP Package (same board area as 8-pin SO)
General Description
The MAX1660 digitally controlled fuel-gauge interface executes two essential functions for rechargeable battery-pack management: fuel gauging and pack overcurrent protection. It accurately monitors a battery pack's charge and discharge current flow, and records each using two independent, on-board Coulomb counters. Each counter's contents are externally accessible via a System Management Bus (SMBusTM)-compatible 2-wire serial interface. An optional third wire interrupts the microcontroller (C) when the charge or discharge counters reach a preset value, or when an overcurrent condition (charge or discharge) occurs. In the event of an overcurrent or short-circuit condition, the MAX1660 disconnects the load and alerts its host. The MAX1660's flexibility allows accurate fuel gauging for any battery chemistry, using any desired control algorithm. The MAX1660 operates with battery voltages from +4V to +28V and provides two micropower shutdown modes, increasing battery lifetime. To minimize total parts count, the device integrates a precision 2.00V system-reference output, a 3.3V linear-regulator output that can supply up to 5mA to power external circuitry, and a power-on reset output for the system C. The MAX1660 is available in a 16-pin QSOP package.
MAX1660*
________________________Applications
Smart-Battery Packs Battery-Pack Overcurrent Protection Industrial-Control System Interfaces Battery-Pack Fuel Gauging Digital Current-Sense Instrumentation Analog-to-Digital Conversion
PART MAX1660EEE
Ordering Information
TEMP. RANGE -40C to +85C PIN-PACKAGE 16 QSOP
Pin Configuration appears at end of data sheet.
___________________________________________________Typical Operating Circuit
PACK+
OCO CS RCS AGND REF
BATT
ODO SHDN VL VCC
MAX1660 GND
C
OCI ODI
SCL SDA INT RST GND PACK-
SMBus is a trademark of Intel Corp. *Patent pending
________________________________________________________________ Maxim Integrated Products 1
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800. For small orders, phone 1-800-835-8769.
Digitally Controlled Fuel-Gauge Interface MAX1660*
ABSOLUTE MAXIMUM RATINGS
BATT, ODO, OCO, SHDN to GND .........................-0.3V to +30V SCL, SDA, INT, RST to GND ....................................-0.3V to +6V REF, ODI, OCI to GND..................................-0.3V to (VL + 0.3V) VL to GND ................................................................-0.3V to +6V CS to GND...................................................................-2V to +6V AGND to GND .............................................................-1V to +1V Continuous Power Dissipation (TA = +70C) 16-Pin QSOP (derate 8.3mW/C above +70C).............667mW Operating Temperature Range ...........................-40C to +85C Storage Temperature Range .............................-65C to +165C Lead Temperature (soldering, 10sec) .............................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V SHDN = VBATT = 12V, VSCL = VSDA = 3.6V, CREF = 10nF, CVL = 0.1F, TA = 0C to +85C, unless otherwise noted. Typical values are at TA = +25C.) PARAMETER SUPPLY AND REFERENCES BATT Input Voltage Range BATT Supply Current VBATT V SHDN = 3.3V, SOFTSHDN = 0, IVL = 0 IBATT V SHDN = 3.3V, SOFTSHDN = 1, IVL = 0 V SHDN 0.4V VL Output Voltage REF Output Voltage REF Load Regulation FUEL GAUGE CS to AGND Input Resistance Discharge Coulomb-Counter Accumulation Rate Charge Coulomb-Counter Accumulation Rate OVERCURRENT COMPARATOR OCI, ODI Input Offset Voltage OCI, ODI Input Offset Current Propagation Delay ODO Sink Current ODO Off-Leakage Current OCO Sink Current OCO Off-Leakage Current INTERFACE-LOGIC LEVELS Input High Voltage Input Low Voltage SDA Output Low Sink Current INT Output Low Sink Current VIH VIL VOL VOL SHDN, SCL, SDA SCL, SDA SHDN VSDA = 0.6V V INT = 0.4V 6 2 2.2 0.8 0.6 V V mA mA VODO = 0.4V VODO = 28V VOCO = 0.4V VOCO = 28V 1 1 (Note 1) -7 -1 0 0.01 1 2.5 0.01 2.5 0.01 1 1 7 1 mV A s mA A mA A VCS = 0 VCS = -120mV VCS = 0 VCS = 120mV 0 49,500 0 49,500 100 2 50,000 2 50,000 12 50,500 12 50,500 k counts/ sec counts/ sec VVL VREF SOFTSHDN = 0, 0 IVL 5mA SOFTSHDN = 1, 0 IVL 5mA IREF = 0 0 IREF 200A 3.1 3.1 1.96 4 80 15 0.02 3.25 3.25 2.00 10 28 135 30 1 3.4 3.6 2.04 50 V V V/A A V SYMBOL CONDITIONS MIN TYP MAX UNITS
*Patent pending 2 _______________________________________________________________________________________
Digitally Controlled Fuel-Gauge Interface
ELECTRICAL CHARACTERISTICS (continued)
(V SHDN = VBATT = 12V, VSCL = VSDA = 3.6V, CREF = 10nF, CVL = 0.1F, TA = 0C to +85C, unless otherwise noted. Typical values are at TA = +25C.) PARAMETER SCL, SDA, INT, RST Leakage Current SHDN Input Bias Current RST Active Timeout Period RST Output Voltage RST Threshold Voltage V RST VTH1, VTH2 VVL = 1V, ISINK = 50A VVL = 3V, ISINK = 1.2mA VTH2, VL falling VTH1, VL rising 1.0 2.75 1.7 2.90 I SHDN SYMBOL CONDITIONS Output forced to 5V SHDN forced to 3.6V SHDN forced to 28V MIN TYP 0.01 0.7 20 25 0.3 0.3 2.2 3.05 MAX 1 3.0 100 UNITS A A ms V V
MAX1660*
ELECTRICAL CHARACTERISTICS
(V SHDN = VBATT = 12V, VSCL = VSDA = 3.6V, CREF = 10nF, CVL = 0.1F, TA = -40C to +85C, unless otherwise noted.) (Note 2) PARAMETER SUPPLY AND REFERENCES BATT Input Voltage Range BATT Supply Current VBATT V SHDN = 3.3V, SOFTSHDN = 0, IVL = 0 IBATT V SHDN = 3.3V, SOFTSHDN = 1, IVL = 0 V SHDN 0.4V VL Output Voltage REF Output Voltage REF Load Regulation FUEL GAUGE Discharge Coulomb-Counter Accumulation Rate Charge Coulomb-Counter Accumulation Rate OVERCURRENT COMPARATOR OCI, ODI Input Offset Voltage OCI, ODI Input Offset Current ODO Sink Current ODO Off-Leakage Current OCO Sink Current OCO Off-Leakage Current (Note 1) VODO = 0.4V VODO = 28V VODO = 0.4V VODO = 28V 1 1 -10 -1 1 1 10 1 mV A mA A mA A VCS = 0 VCS = -120mV VCS = 0 VCS = 120mV 0 49,250 12 50,750 0 12 counts/ sec counts/ sec VVL VREF SOFTSHDN = 0, 0 IVL 5mA SOFTSHDN = 1, 0 IVL 5mA IREF = 0 0 IREF 200A 3.1 3.1 1.96 4 28 135 30 1 3.4 3.6 2.04 50 V V V/A A V SYMBOL CONDITIONS MIN TYP MAX UNITS
*Patent pending _______________________________________________________________________________________ 3
Digitally Controlled Fuel-Gauge Interface MAX1660*
ELECTRICAL CHARACTERISTICS (continued)
(V SHDN = VBATT = 12V, VSCL = VSDA = 3.6V, CREF = 10nF, CVL = 0.1F, TA = -40C to +85C, unless otherwise noted.) (Note 2) PARAMETER INTERFACE-LOGIC LEVELS Input High Voltage Input Low Voltage SDA Output Low Sink Current INT, RST Output Low Sink Current SCL, SDA, INT, RST Leakage Current SHDN Input Bias Current RST Output Voltage RST Threshold Voltage ISHDN VRST VTH1, VTH2 VIH VIL VOL VOL SHDN, SCL, SDA SCL, SDA SHDN VSDA = 0.6V VINT = 0.4V Output forced to 5V SHDN forced to 3.6V SHDN forced to 28V VVL = 1V, ISINK = 50A VVL = 3V, ISINK = 1.2mA VTH2, VL falling VTH1, VL rising 1.0 2.75 6 2 1 3.0 120 0.3 0.3 2.2 3.05 2.2 0.8 0.6 V V mA mA A A V V SYMBOL CONDITIONS MIN TYP MAX UNITS
TIMING CHARACTERISTICS
(TA = 0C to +85C, unless otherwise noted.) PARAMETER SCL Serial-Clock High Period SCL Serial-Clock Low Period Start-Condition Setup Time Start-Condition Hold Time SDA Valid to SCL Rising-Edge Setup Time, Slave Clocking in Data SCL Falling Edge to SDA Transition SCL Falling Edge to SDA Valid, Master Clocking in Data SYMBOL tHIGH tLOW tSU:STA tHD:STA tSU:DAT tHD:DAT tDV CONDITIONS MIN 4 4.7 4.7 4 800 0 1 TYP MAX UNITS s s s s ns ns s
*Patent pending 4 _______________________________________________________________________________________
Digitally Controlled Fuel-Gauge Interface
TIMING CHARACTERISTICS
(TA = -40C to +85C, unless otherwise noted.) (Note 2) PARAMETER SCL Serial-Clock High Period SCL Serial-Clock Low Period Start-Condition Setup Time Start-Condition Hold Time SDA Valid to SCL Rising-Edge Setup Time, Slave Clocking in Data SCL Falling Edge to SDA Transition SCL Falling Edge to SDA Valid, Master Clocking in Data SYMBOL tHIGH tLOW tSU:STA tHD:STA tSU:DAT tHD:DAT tDV CONDITIONS MIN 4 4.7 4.7 4 800 0 1 TYP MAX UNITS s s s s ns ns s
MAX1660*
Note 1: OCI and ODI are MOSFET inputs. Minimum and maximum limits are for production screening only. Actual performance is indicated in typical value. Note 2: Specifications to -40C are guaranteed by design, not production tested.
START CONDITION
MOST SIGNIFICANT ADDRESS BIT (A6) CLOCKED INTO SLAVE
A5 CLOCKED INTO SLAVE
A4 CLOCKED INTO SLAVE
A3 CLOCKED INTO SLAVE
SCL
tHD:STA
tLOW
tHIGH
SDA
tSU:STA
tSU:DAT
tHD:DAT
tSU:DAT
tHD:DAT
Figure 1. SMBus Serial-Interface Timing--Address
ACKNOWLEDGE BIT CLOCKED INTO MASTER MOST SIGNIFICANT BIT OF DATA CLOCKED INTO MASTER
RW BIT CLOCKED INTO SLAVE
SCL
SDA
SLAVE PULLING SDA LOW
tDV
tDV
Figure 2. SMBus Serial-Interface Timing--Acknowledge
*Patent pending _______________________________________________________________________________________ 5
Digitally Controlled Fuel-Gauge Interface MAX1660*
__________________________________________Typical Operating Characteristics
(VBATT = V SHDN = 12V, CREF = 10nF, CVL = 0.1F, TA = +25C, unless otherwise noted.)
SUPPLY CURRENT vs. VBATT
MAX1660-01
SHUTDOWN SUPPLY CURRENT vs. VBATT
19 18 SUPPLY CURRENT (A) SOFTSHDN = 1 TA = +85C TA = +25C
MAX1660-02
SHUTDOWN SUPPLY CURRENT vs. VBATT
SHDN = GND SUPPLY CURRENT (A) 0.04
MAX1660-03
100
20
0.05
90 SUPPLY CURRENT (A)
TA = +85C TA = +25C
17 16 15 14 13 12 11
80
0.03
TA = +85C
TA = +25C
70 TA = -40C 60
TA = -40C
0.02 TA = -40C 0.01
50 4 8 12 16 VBATT (V) 20 24 28
10 4 8 12 16 VBATT (V) 20 24 28
4
8
12
16 VBATT (V)
20
24
28
VL VOLTAGE vs. VL LOAD CURRENT
MAX1660-04
REFERENCE VOLTAGE vs. REFERENCE LOAD CURRENT
MAX1660 05
FREQUENCY vs. INPUT VOLTAGE
MAX1660-06
3.30
2.004
8 6 FREQUENCY (Hz) 4 2 0 -2 -4 INPUT OFFSET VOLTAGE INPUT OFFSET FREQUENCY
3.27 VL VOLTAGE (V) VOLTAGE (V) TA = -40C
2.002
3.24
2.000 TA = -40C 1.998 TA = +25C
3.21
TA = +25C TA = +85C
3.18
1.996 TA = +85C
3.15 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 LOAD CURRENT (mA)
1.994 0 20 40 60 80 100 120 140 160 180 200 LOAD CURRENT (A)
-15
-10
-5
0
5
10
INPUT VOLTAGE (V)
FREQUENCY vs. INPUT VOLTAGE
120 90 FREQUENCY (kHz) 60 30 0 30 60 90 120 150 -360 -240 0 120 -120 INPUT VOLTAGE (mV) 240 360 DISCOUNT CHGCOUNT IDEAL
MAX1660-07
CONVERSION GAIN vs. INPUT VOLTAGE
456 452 448 444 440 436 432 428 424 420 416 412 408 404 0.001 UNCORRECTED*
MAX1660-08
150 MEASURED
CONVERSION GAIN (Hz/mV)
275:1 OFFSET CORRECTED* 6000:1
0.01
0.1
1 INPUT VOLTAGE (mV)
10
100
1000
*Patent pending *SEE INTERNAL OFFSET MEASUREMENT SECTION 6 _______________________________________________________________________________________
Digitally Controlled Fuel-Gauge Interface
______________________________________________________________Pin Description
PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 NAME INT SHDN N.C. CS AGND REF ODI OCI GND VL BATT ODO OCO RST SDA SCL FUNCTION Open-Drain Host-Interrupt Output. INT sinks current when active, otherwise high-impedance (see INT Output section). INT is compatible with the SMBus SMBALERT# (the "#" indicates asserted low) signal. Connect a 100k pull-up resistor between INT and VL. Leave INT unconnected if host interrupt is not used. Active-Low Shutdown Input (see Shutdown Modes section) No Connection. Not internally connected. Current-Sense Resistor Input Analog Ground 2.00V Reference Output. Bypass REF to AGND with a 10nF capacitor (see Internal Regulator and Reference section). Discharge Overcurrent-Detection Input (see Overcurrent Detection section) Charge Overcurrent-Detection Input (see Overcurrent Detection section) Ground 3.3V Linear-Regulator Output. Bypass VL with a 0.33F capacitor to GND (see Internal Regulator and Reference section). Supply Input High-Voltage, Open-Drain MOSFET Gate-Driver Output. ODO controls activation of the battery-discharge path (see OCO and ODO Gate Drivers section). High-Voltage, Open-Drain MOSFET Gate-Driver Output. OCO controls activation of the battery-charge path (see OCO and ODO Gate Drivers section). Active-Low Reset Output. Connect a 100k pull-up resistor between RST and VL. Leave RST unconnected if the power-on reset function is not used (see RST Output section). Serial-Data Input/Output. Connect a 10k resistor between SDA and VL (see SMBus Interface section). Serial-Clock Input. Connect a 10k resistor between SDA and VL (see SMBus Interface section).
MAX1660*
_______________Detailed Description
The MAX1660 measures the cumulative charge into (charging) and out of (discharging) the system battery pack and stores the information in one of two internal, independent charge and discharge counters. It achieves battery-pack overcharge and overdischarge protection through a powerful digital compare function that interrupts the host CPU when the charge or discharge counter reaches a host-programmed value. The device also informs the host of changes in the direction of current flow and protects the battery pack from short-circuit and overcurrent conditions. The MAX1660 incorporates a 2-wire System Management Bus (SMBusTM)-compliant serial interface, allowing access to charge/discharge counters and internal registers. An optional third wire provides an SMBALERT#-compliant interrupt signal, or it may be used as a simple, stand-alone host interrupt.
Coulomb-Counting Interface
The MAX1660's Coulomb-counting interface monitors the charge flowing in either the charging or discharging direction, and counts the Coulombs of charge by incrementing either the charge counter (CHGCOUNT) or the discharge counter (DISCOUNT) accordingly. The number of counter increments generated per Coulomb of charge sensed (conversion gain) is given by the following equation: A C = 416.7
10 RCS
3
Counts Coulomb
where RCS is the current-sense resistor (see the Typical Operating Circuit). The gain factor is the constant of proportionality that relates the counter values stored in CHGCOUNT and DISCOUNT to the amount of charge flow into or out of the battery pack. A higher conversion gain (larger RCS) increases resolution at low currents,
7
*Patent pending _______________________________________________________________________________________________________
Digitally Controlled Fuel-Gauge Interface MAX1660*
but limits the maximum measurable current. Likewise, a smaller conversion gain (smaller RCS) decreases resolution at low currents, but increases the maximum measurable current. A 30m current-sense resistor (AC = 12.5 x 103 counts per Coulomb) provides a good balance between resolution and input current range for many applications. With this current-sense resistance, the MAX1660 typically measures currents from 600A to 4A with better than 1% accuracy (see the section Choosing RCS). Execute the ReadCount01 and ReadCount23 commands to read the active counter's contents at any time (Table 2). Since the Read-Word protocol supports only 16-bit data transfers, issue these commands sequentially to read the entire 32-bit COUNT register. First issue ReadCount01 to read COUNT0 and COUNT1, and then issue ReadCount23 to read COUNT2 and COUNT3. Executing ReadCount01 enables updating of the COUNT register; the COUNT register updates on SCL's falling edge after the command-byte ACK bit
Charge and Discharge Counters
Figure 3 shows the functional diagram of the MAX1660's Coulomb-counter section. The Coulomb counter's output increments (but never decrements) one of two independent 32-bit counters: CHGCOUNT for charging currents, and DISCOUNT for discharging currents. By independently counting the charge and discharge currents, the MAX1660 can accommodate any algorithm to account for a battery pack's energy-conversion efficiency. A 2x1 multiplexer, gated by the configuration word's SETCOUNT bit, determines which counter's contents are passed to the COUNT register when COUNT updates. The 32-bit COUNT register is divided into 4 bytes: COUNT0 (the least significant) through COUNT3 (the most significant). See Table 1 for a description of the different registers. CHGCOUNT and DISCOUNT reset to zero whenever a power-on reset executes, or when the configuration word's CLRCOUNTER bit is set. Each counter also resets any time an overflow condition occurs. The counters' 32-bit capacity allows them to continually monitor 4A for almost 24 hours before overflowing (with RCS = 30m). When a counter overflows, it simply clears and begins counting from 0; no interrupts are generated.
DIRINTENABLE OFFSETMEAS COULOMB COUNTER DIRCHANGE CHARGESTATUS
CHGCOUNT CLRCOUNTER 32 SETCOUNT COUNTSTATUS 2 x 1 MUX
DISCOUNT
32 ReadCount01 ReadCount23 LATCH LOGIC
MUXOUT 32 8 8 8 8
COUNT3 COUNT2 COUNT1 COUNT0 8 8 8 8
SMB INTERFACE
Figure 3. Coulomb Counter Functional Diagram
Table 1. Register Descriptions
REGISTER NAME CHGCOUNT DESCRIPTION The 32-bit counter that accumulates the number of units of charge that have passed through RCS in the charging direction since CHGCOUNT was last cleared. CHGCOUNT clears on a power-on reset, or when the configuration word's CLEARCOUNTER bit is set. CHGCOUNT is unaffected by discharging currents. The 32-bit counter that accumulates the number of units of charge that have passed through RCS in the discharging direction since DISCOUNT was last cleared. DISCOUNT clears on a power-on reset, or when the configuration word's CLEARCOUNTER bit is set. DISCOUNT is unaffected by charging currents. The 32-bit register that stores the value held in the counter selected by the configuration word's SETCOUNT bit when updating has been enabled by the ReadCount01 command. Data transfers to COUNT from the selected CHGCOUNT or DISCOUNT register whenever the MAX1660's SMBus interface detects a new command. See the Charge and Discharge Counters section. The 32-bit register that stores the host-defined COUNT threshold. The contents of COMP are continuously compared with the contents of either CHGCOUNT or DISCOUNT (whichever is selected by the SETCOUNT bit) for equality. When an equality occurs, the configuration word's COMPSTATUS bit is set, and an interrupt is generated (INT goes low).
DISCOUNT
COUNT
COMP
*Patent pending 8 _______________________________________________________________________________________
Digitally Controlled Fuel-Gauge Interface
Table 2. Read Word Commands
COMMAND NAME ReadCount01 COMMAND CODE 0x82 DESCRIPTION Enables updating of the COUNT register; returns COUNT0 in the LSB and COUNT1 in the MSB of the Read-Word protocol. COUNT updating remains enabled until the ReadCount23 command is executed. See the Charge and Discharge Counters section. Disables COUNT register updating; returns COUNT2 in the LSB and COUNT3 in the MSB of the Read-Word protocol. See the Charge and Discharge Counters section. Returns the status word's contents in the Read-Word protocol's LSB. The MSB's contents are all 1s. See Table 5 for a description of the status bits.
MAX1660*
ReadCount23 ReadStatus()
0x83 0x84
clocks in (Figure 4). COUNT0 returns in the least significant byte (LSB), and COUNT1 returns in the most significant byte (MSB) of the Read-Word protocol. After the ReadCount01 command is executed (updating is enabled), any command executed by the MAX1660 prior to execution of the ReadCount23 command updates the COUNT contents, potentially corrupting the data read by ReadCount23 (if a 16th-bit carry occurs). ReadCount23 disables COUNT updating and then returns COUNT2 and COUNT3 in the Read-Word protocol's LSB and MSB. To ensure proper execution, issue these commands in the correct order, with no commands executed between them (ReadCount01 first, followed by ReadCount23).
ACKNOWLEDGE BIT CLOCKED INTO MASTER
COUNT REGISTER UPDATED
SCL
SDA
ANY COMMAND BYTE MAX1660 PULLING SDA LOW
Digital Compare Function
The MAX1660's digital compare function simplifies implementation of end-of-charge and end-of-discharge detection, relieving the host from having to constantly monitor the counters. The host simply programs a value into the COMP register, and the MAX1660 generates an interrupt (INT goes low) when this condition is met. Figure 5 shows the MAX1660's digital compare section functional diagram. When the digital compare function is enabled, the MAX1660 continuously compares the contents of the counter selected by the configuration word's SETCOUNT bit with the 32-bit word stored in the COMP register (Table 1). The 32-bit COMP register is divided into 4 bytes: COMP0 (the least significant) through COMP3 (the most significant). When COMP is equal to MUXOUT, the configuration word's COMPSTATUS bit is set, and the MAX1660 generates an interrupt (INT goes low). The host defines any action taken as a result of this interrupt. The COMP register contents remain valid until either the host redefines the value stored in COMP, or a power-on reset is executed. Executing a power-on reset disables the digital compare function. Enable the digital compare function by setting the configuration word's COMPENABLE bit.
*Patent pending
Figure 4. COUNT Register Updating
INT
OCSTATUS ODSTATUS
DIRCHANGE COMPSTATUS
CLRINT POWER-ON RESET CLR
Q D
CHG DIS
COULOMB COUNTER
32 COMP3 COMP2 COMP1 COMP0
DIGITAL COMPARE
32 MUXOUT DIRINTENABLE
8
8
8
8
SMB INTERFACE
Figure 5. Digital Compare Section Functional Diagram
_______________________________________________________________________________________
9
Digitally Controlled Fuel-Gauge Interface
Use the WriteComp01 and WriteComp23 commands to define the COMP register contents (Table 3). Since the Write-Word protocol supports only 16-bit data transfers, sequentially execute these commands to write the entire 32-bit COMP word. First execute WriteComp01 to write COMP0 and COMP1, and then execute WriteComp23 to write COMP2 and COMP3. Executing WriteComp01 internally disables the COMPINT interrupt and writes the Write-Word protocol's LSB into COMP0 and its MSB into COMP1. The COMPINT interrupt disables on SCL's 18th rising edge during WriteComp01 execution (Figure 6). Executing WriteComp23 writes the Write-Word protocol's LSB and MSB into COMP2 and COMP3, and enables the COMPINT interrupt. The COMPINT interrupt reenables on the falling edge following SCL's 36th rising edge during WriteComp23 execution. Disabling the COMPINT interrupt with the WriteComp01 command prevents an erroneous interrupt, due to incomplete data in the COMP register. To ensure proper execution, issue these commands in the correct sequence.
MAX1660*
Direction-Change Detection Function
The MAX1660's direction-change detection function informs the host whenever the current flow changes direction. When it is used in conjunction with the MAX1660's digital compare function and CHARGESTATUS bit in end-of-charge and end-of-discharge detection routines, the host can ensure that the digital compare function continues to monitor the proper counter when the current flow changes direction. The direction-change function is simple: the status word's DIRCHANGE bit sets any time the current flow changes direction. Once DIRCHANGE is set, it remains set until it is cleared; additional changes in the currentflow direction do not affect the bit. To clear the DIRCHANGE bit, write a 1 to the configuration word's CLRINT bit. DIRCHANGE also clears when the MAX1660 enters soft-shutdown mode and after a power-on reset. In end-of-charge and end-of-discharge routines, in which the host must be informed immediately of a change in current-flow direction, set the configuration word's DIRINTENABLE bit to generate an interrupt whenever the status word's DIRCHANGE bit is set.
Table 3. Write-Word Commands
COMMAND NAME WriteComp01 WriteComp23 WriteConfig() COMMAND CODE 0x00 0x01 0x04 DESCRIPTION Disables the COMPINT interrupt; writes the Write-Word protocol's LSB into COMP0 and its MSB into COMP1. Writes the Write-Word protocol's LSB into COMP2 and its MSB into COMP3, and enables the COMPINT interrupt. Writes the Write-Word protocol's data bytes into the configuration word. See Table 6 for a description of the configuration bits.
18TH RISING EDGE OF SCL DURING WriteComp01 WRITE-WORD PROTOCOL ACK BIT CLOCKED INTO HOST STOP CONDITION 36TH RISING EDGE OF SCL DURING WriteComp23 WRITE-WORD PROTOCOL ACK BIT CLOCKED INTO HOST STOP CONDITION
SCL
INTERRUPT DISABLES ON SCL's RISING EDGE SDA
INTERRUPT ENABLES ON SCL's FALLING EDGE
BOLD LINE INDICATES MAX1660 PULLING SDA LOW
Figure 6. Automatic Interrupt Enable/Disable During COMP Update *Patent pending 10 ______________________________________________________________________________________
Digitally Controlled Fuel-Gauge Interface
Overcurrent Detection
The MAX1660's precision analog interface continuously monitors the input current to detect an overcurrent condition. Figure 7 shows the functional diagram of the overcurrent comparator section. An overcurrent condition occurs whenever the voltage on CS exceeds the voltage on OCI (for charging currents), or when ODI falls below ground (for discharging currents). When an overcurrent condition occurs, the overcurrent comparators generate an interrupt (INT goes low) and set the OD (discharging) or OC (charging) latch, which remains set until either the configuration word's CLRINT bit is set, the MAX1660 enters softshutdown mode, or the MAX1660 initiates a power-on reset. The host defines any action taken upon receipt of this interrupt. A logic block follows the latch, which sets the gate-driver output's appropriate state, as defined in Table 4, and drives the N-channel MOSFET open-drain gate drivers. Although the host has complete control over the MAX1660's response to an overcurrent condition, take care to ensure adequate overcurrent protection. In general, the configuration word's OCLO and ODLO bits should always remain cleared. This ensures that either the MAX1660 will be in overcurrent auto-detect mode (the power-on-reset state), or the external FETs are forced off (the load is disconnected). Regardless of the OCLO and ODLO bit settings, the MAX1660 interrupts the host (INT goes low) if the current flow exceeds the overcurrent threshold. When OCHI = OCLO = 1 or ODHI = ODLO = 1, the corresponding overcurrent comparator operates in freerunning mode, driving OCO and ODO directly. When the current exceeds the overcurrent threshold, the appropriate MOSFET turns off, and when the current is below the overcurrent threshold, it turns on. Forcing the MOSFET off prevents current from flowing, which in turn decreases the current flow to below the overcurrent threshold. A persistent overcurrent condition, therefore, produces a pulsed output as the current flow repeatedly crosses the overcurrent threshold. In freerunning mode, INT pulls low when the first overcurrent condition occurs, and stays low until the interrupt is cleared, as described in the INT Output section. Operation in this mode requires that OCO and ODO be buffered to ensure fast MOSFET turn-off and slow MOSFET turn-on times. The relatively slow turn-off response of the OCO and ODO open-drain outputs alone is unsuitable for driving MOSFETs directly in this mode.
MAX1660*
a) DISCHARGING DIRECTION ODICMP ODSTATUS ODI + S R OD Q ODO LOGIC ODO
CLRINT
POWER-ON ODLO RESET
ODHI
b) CHARGING DIRECTION OCICMP OCSTATUS OCI CS + S R OC Q OCO LOGIC OCO
CLRINT
POWER-ON OCLO RESET
OCHI
Figure 7. Overcurrent Comparator Section Functional Diagram *Patent pending ______________________________________________________________________________________
11
Digitally Controlled Fuel-Gauge Interface MAX1660*
Table 4a. OCO Logic Truth Table
OCHI BIT 0 0 0 1 1 OCLO BIT 0 0 1 0 1 OCSTATUS BIT 0 1 X X X OCO OUTPUT GND HI-Z GND HI-Z OCICMP STATE Automatic overcurrent protection (default) Overcurrent detected Force-charge path on Force-charge path off Free running
Table 4b. ODO Logic Truth Table
ODHI BIT 0 0 0 1 1 ODLO BIT 0 0 1 0 1 ODSTATUS BIT 0 1 X X X ODO OUTPUT GND HI-Z GND HI-Z ODICMP STATE Automatic overcurrent protection (default) Overcurrent detected Force-discharge path on Force-discharge path off Free running
M2 R7
M1
PACK+
R8
R10
R9 R11
VCC SCL SDA
SERIAL EEPROM
+
OCO
BATT
ODO SHDN
GND R2 CS C3 RCS C5 AGND C2 REF R5 R3 OCI ODI R6 R4 C4 PACKSCL SDA INT RST GND
MAX1660
VL C1 R13 R14 R15 R16 D1
VCC C GPIO GPIO GPIO INT RST GND
Figure 8. Typical Application Circuit *Patent pending 12 ______________________________________________________________________________________
Digitally Controlled Fuel-Gauge Interface
OCO and ODO Gate Drivers
OCO and ODO are open-drain N-channel MOSFET outputs that drive the external P-channel MOSFET gates. Connect pull-up resistors in the 500k to 1M range from OCO and ODO to BATT to reduce current draw when OCO and ODO are driven low. For additional protection of OCO and ODO from voltage spikes coupled through the MOSFET gate capacitance, place 10k resistors (R9 and R10) from OCO and ODO to the respective MOSFET gates (Figure 8). To protect the battery pack and load during power-up, OCO and ODO are forced into a high-Z state during the poweron-reset timeout period. Table 4 shows the truth tables defining the OCO and ODO output states with respect to the overcurrent comparators and the MAX1660's configuration bits.
RST Output
RST is an open-drain, active-low power-on reset output provided for the MAX1660's host controller and other external circuitry. RST drives low on power-up whenever the MAX1660 enters hard-shutdown mode, or whenever the VL regulator output is below VTH1 (typically 1.7V). In hard-shutdown mode, RST goes low and remains low as long as the VL regulator provides sufficient gate drive to the RST output switch (typically until VL falls to 1V), after which RST drifts slightly upward. On power-up or when exiting hard-shutdown mode, RST drives low until 25ms (typ) after VL exceeds VTH2 (typically 2.9V). Although RST offers a reliable poweron reset function, it does not detect brownout conditions (VTH1 < VL < VTH2). For applications that require brownout detection, refer to Maxim's complete line of precision microprocessor supervisory products. Connect a 100k pull-up resistor between RST and VL. Leave RST unconnected if the power-on reset function is not used.
MAX1660*
INT Output
The MAX1660's INT output drives an optional third wire that interrupts the host whenever an alert condition occurs. The MAX1660's host-interrupt procedure is compatible with the SMBus SMBALERT# signal, but it is equally useful as a simple host-interrupt output. By default, an interrupt is triggered (INT is pulled low) any time an overcurrent condition occurs (see the Overcurrent Detection section). The MAX1660 may also be configured to generate an interrupt whenever a digital compare equality occurs and/or when a change in the current-flow direction is detected (see the Digital Compare Function and Direction-Change Detection Function sections). Once triggered, INT stays low until the interrupt is cleared. An interrupt is cleared when one of three conditions is true: a 1 is written into the configuration word's CLRINT bit, the MAX1660 acknowledges the SMBus Alert Response Address (ARA), or a power-on reset occurs. The MAX1660 acknowledges the ARA with the 0 x 8F byte. INT is an open-drain output; connect a 100k pull-up resistor between INT and VL.
Internal Regulator and Reference
The 3.3V VL internal linear regulator powers the MAX1660 control circuitry, logic, and reference, and can supply up to 5mA to power external loads, such as a microcontroller or other circuitry. Bypass VL to GND with a 0.33F capacitor. The 2.00V precision reference (REF) is accurate to 2%, making it useful as a system reference. REF can supply up to 200A to external circuitry. Bypass REF to GND with a 10nF capacitor.
Shutdown Modes
Hard Shutdown Driving SHDN low puts the MAX1660 into hard-shutdown mode and forces the power-on reset state. In hard-shutdown mode, the VL regulator and the reference turn off, reducing supply current to 1A (max). To protect the battery pack and load during the power-onreset timeout period, the OCO and ODO outputs are forced into their high-Z states. SHDN is a logic-level input, but can be safely driven by voltages up to VBATT. Soft Shutdown Drive the MAX1660 into soft-shutdown mode by setting the configuration word's SHDNSTATUS bit. All interrupts clear in soft-shutdown mode. In this mode, only the VL regulator and the SMBus interface remain active, reducing the supply current to just 15A. To prevent current from flowing undetected while the MAX1660 remains in soft-shutdown mode, ensure that the command to enter soft-shutdown mode contains a
Alert Response Address (0001100)
The Alert Response address provides quick fault identification for single slave devices that lack the complex, expensive logic needed to be a BusMaster. When a slave device generates an interrupt, the host (BusMaster) interrogates the bus slave devices via a special receive-byte operation that includes the Alert Response address. The data returned by this read-byte operation is the address of the interrupting slave device. The MAX1660 when interrupted, will respond with 0x8F.
*Patent pending
______________________________________________________________________________________
13
Digitally Controlled Fuel-Gauge Interface MAX1660*
low byte of 0xA (ODHI = OCHI = 1, ODLO = OCLO = 0) to force the FETs off and disconnect the load. The MAX1660 does not perform a power-on reset when exiting soft-shutdown mode.
STOP Rd A LEAST SIGNIFICANT BYTE A MOST SIGNIFICANT BYTE A ACK D8 D9 D10 D11 D12 D13 D14 D15 ACK D0 D1 D2 D3 D4 D5 D6 D7 ACK R 1 1 1 0 0 0 1
SMBus Interface
The MAX1660's 2-wire serial interface is compatible with Intel's SMBus interface. An interrupt output (INT) allows the MAX1660 to immediately interrupt its host in the event of an overcurrent condition. This interrupt complies with the SMBALERT# signal of the SMBus specification. Although each of the MAX1660's pins are designed to protect against 2kV ESD strikes, SDA and SCL pins have extended ESD-protection structures designed to provide protection for 4kV ESD. The MAX1660 operates as an SMBus slave only, never as a master. It does not initiate communication on the bus; it only receives commands and responds to queries for status information. Although the MAX1660 offers the host an array of configuration commands, providing complete control over many of its functions, it performs its functions automatically. The host needs to communicate with the MAX1660 only to retrieve data and change configurations as necessary. Each communication with the MAX1660 begins with a start condition, defined as a falling edge on SDA with SCL high. The device address follows the start condition. The MAX1660 device address is fixed at 0b1000111 (where 0b indicates a binary number), which may also be denoted as 0x8E (where 0x indicates a hexadecimal number) for Read-Word commands, or 0x8F for Write-Word commands. Figure 9 shows examples of SMBus Write-Word and Read-Word protocols.
STOP MOST SIGNIFICANT BYTE A ACK D8 D9 D10 D11 D12 D13 D14 D15 ACK D0 D1 D2 D3 D4 D5 D6 D7 ACK CMD0 CMD1 CMD2 CMD3 CMD4 CMD5 CMD6 CMD7 ACK W 1 1 1 0 0 0 1 SDA SCL
SLAVE ADDRESS
LEAST SIGNIFICANT BYTE A
REPEATED START
A
A
ReadStatus() Command
The host determines the MAX1660's status by executing the ReadStatus() command. This command returns the MAX1660's status, including the state of its interrupts, as well as the present direction of current flow. Table 5 describes each of the status word's bits. Status information is retrieved from the MAX1660 using the Read-Word protocol; however, the device's flexible implementation of the SMBus standard also allows the Receive-Byte protocol to be substituted when status is being read. When the MAX1660 receives a command, its command code is latched, remaining valid until it is overwritten by a new command code. When status information is repeatedly being read, polling time can be significantly decreased by using the Receive-Byte protocol to read the status word's LSB after the initial ReadStatus() command.
WRITE-WORD PROTOCOL
START
START
Figure 9. Write-Word and Read-Word Examples
*Patent pending 14 ______________________________________________________________________________________
SDA
SCL
READ-WORD PROTOCOL
ACK CMD0 CMD1 CMD2 CMD3 CMD4 CMD5 CMD6 CMD7 ACK W 1 1 1 0 0 0 1
Wr A
COMMAND CODE
SLAVE ADDRESS
SLAVE ADDRESS
Wr A
COMMAND CODE
BOLD LINE INDICATES THAT MAX1660 PULLS SDA LOW
Digitally Controlled Fuel-Gauge Interface
Table 5. ReadStatus( ) Bit Functions
BIT NAME -- -- -- -- -- -- -- -- ODSTATUS BIT POSITION 15 14 13 12 11 10 9 8 7 POWER-ON RESET STATE 1 1 1 1 1 1 1 1 0 Unused. Always returns 1. Unused. Always returns 1. Unused. Always returns 1. Unused. Always returns 1. Unused. Always returns 1. Unused. Always returns 1. Unused. Always returns 1. Unused. Always returns 1. Overcurrent-Interrupt Status. This bit sets when an overcurrent condition occurs in the discharging direction. This bit clears in soft shutdown, following a power-on reset, or when the configuration word's CLRINT bit is set. Overcurrent-Interrupt Status. This bit sets when an overcurrent condition occurs in the charging direction. This bit clears in soft shutdown, following a power-on reset, or when the configuration word's CLRINT bit is set. COMPINT-Interrupt Status. This bit sets upon generation of the COMPINT interrupt. This bit clears in soft shutdown, on a power-on reset, or when the configuration word's CLRINT bit is set. SETCOUNT Status Indicator. This bit sets when the configuration word's SETCOUNT bit is set. This bit clears when SETCOUNT clears. Soft-Shutdown Status Indicator. Returns 1 when the device is in soft-shutdown mode; returns 0 when it is not in soft-shutdown mode. Charge-Status Indicator. This bit sets upon detection of charging current. The bit clears upon detection of discharging current. The bit sets when the current flow changes direction. This bit clears when the configuration word's CLRINT or SOFTSHDN bit is set, or following a power-on reset. See Direction-Change Detection Function section. Unused. Always returns 1. DESCRIPTION
MAX1660*
OCSTATUS
6
0
COMPSTATUS COUNTSTATUS SHDNSTATUS CHARGESTATUS DIRCHANGE --
5 4 3 2 1 0
0 -- 0 0 0 --
WriteConfig() Command
The host configures the MAX1660 using the WriteConfig() command. Table 6 describes each of the configuration word's bits.
ceptable results. Be sure to consider power dissipation when choosing the current-sense resistor to avoid resistor self-heating.
Applications Information
Choosing RCS For greatest accuracy, choose RCS to ensure that the product of the maximum current to be measured (IMAX) and RCS does not exceed 120mV. Calculate the proper sense-resistor value as follows:
RCS = 120mV IMAX
Setting the Overcurrent Threshold
Set the current at which the voltage on CS exceeds the voltage on OCI with a voltage divider placed between REF and GND (Figure 10a). To set the overcharge threshold, choose R5 in the 1M range and calculate R6 from:
R6 =
R5 VREF - 1 I CHG,MAXRCS
where IMAX is the maximum current to be accurately measured. Use only surface-mount metal-film resistors; wire-wound resistors are too inductive to provide ac*Patent pending
where VREF = 2.00V, ICHG,MAX is the maximum allowable charging current, and RCS is the current-sense resistor value.
15
______________________________________________________________________________________
Digitally Controlled Fuel-Gauge Interface MAX1660*
Table 6. WriteConfig( ) Bit Functions
BIT NAME -- -- -- -- -- DIRINTENABLE SOFTSHDN CLRCOUNTER CLRINT SETCOUNT BIT POSITION 15 14 13 12 11 10 9 8 7 6 POWER-ON RESET STATE -- -- -- -- -- 0 0 -- -- 0 Unused Unused Unused Unused Unused Direction-Change Interrupt Enable. Set this bit to enable direction-change interrupt generation. Clear this bit to disable this function. See the DirectionChange Detection Function section. Soft-Shutdown Enable. Set this bit to enable soft shutdown. Clear this bit to resume normal operation. See the Shutdown Modes section. Clear Counter. Write 1 to clear both CHGCOUNT and DISCOUNT. Clear Interrupts. Write 1 to clear ODSTATUS, OCSTATUS, COMPSTATUS, and DIRCHANGE. Counter Selection. Selects which counter is multiplexed to COUNT. Set this bit to select the charge counter. Clear this bit to select the discharge counter. See the Charge and Discharge Counters section. Offset-Measurement Enable. Set this bit to disconnect CS from the external circuitry and internally short it to AGND. Clear this bit to reconnect CS to the external circuitry and resume normal operation. See the Internal Offset Measurement section. the Compare-Interrupt Enable. Set this bit to enable the digital compare function. Clear this bit to disable this function. See the Digital Compare Function section. First of two bits controlling the ODO output state. See the Overcurrent Detection section. Second of two bits controlling the ODO output state. To ensure proper overcurrent protection, ODLO should always remain cleared. See the Overcurrent Detection section. First of two bits controlling OCO output state. See the Overcurrent Detection section. Second of two bits controlling OCO output state. To ensure proper overcurrent protection, OCLO should always remain cleared. See the Overcurrent Detection section. DESCRIPTION
OFFSETMEAS
5
0
COMPENABLE ODHI ODLO OCHI OCLO
4 3 2 1 0
0 0 0 0 0
a) CHARGING CURRENTS REF R5 OCI C5 R6 CS
b) DISCHARGING CURRENTS TO BATTR3 ODI REF R4
MAX1660
RCS
C4 AGND
MAX1660
AGND
GND
Figure 10. Overcurrent-Detection Networks *Patent pending 16 ______________________________________________________________________________________
Digitally Controlled Fuel-Gauge Interface
Set the current at which the ODI voltage falls below AGND with a voltage divider placed between REF and CS (Figure 10b). To set the overdischarge threshold, choose R3 in the 1M range, then calculate R4 from: R4 = R3 IDISCHG,MAXRCS VREF MAX1660's digital compare function to limit activity on the digital data lines during the measurement. By removing the requirement that the host poll the MAX1660 to determine when a counter has reached the desired value, the MAX1660 requires no digital switching while it accumulates sensitive data. See Digital Compare Function section.
MAX1660*
where V REF = 2.00V, I DISCHG,MAX is the maximum allowable discharging current, and RCS is the currentsense resistor value. Lowpass filter the ODI and OCI inputs with C4 and C5 (Figure 10) to prevent short current pulses from tripping the overcurrent thresholds. Use the smallest capacitances that provide the desired filtering; large capacitances slow the MAX1660's response to overcurrent conditions.
Exiting Hard-Shutdown Mode
In most applications, hard-shutdown mode is used only when the battery pack has become fully discharged, at which point the pack's load current must be minimized to prevent cell overdischarge. When the MAX1660's host is powered from VL, which turns off in hardshutdown mode, the host is unable to signal the MAX1660 to exit hard-shutdown mode. Figure 8's circuit demonstrates a simple topology that handles this situation. During normal operation, the external MOSFETs M1 and M2 conduct so that V SHDN is pulled up to VBATT. If M1 is forced off, however, the voltage at SHDN falls toward ground. To ensure that the signal at SHDN is a logic high, one of the host's GPIO lines is programmed high at all times and is connected to SHDN through diode D1. This diode protects the GPIO pin from voltages at PACK+ that exceed the VL voltage. To command the MAX1660 to enter hard-shutdown mode, the host simply turns MOSFET M1 off and drives the GPIO line low, allowing the MAX1660's SHDN to fall. Once in hard-shutdown mode, the MAX1660 cannot wake up until a valid supply voltage is applied to PACK+ (i.e., when the battery is connected to a charger), pulling SHDN high through R11.
Internal Offset Measurement
Although the MAX1660 has extremely low input offset error, some low-current, high-precision applications may require accounting for this offset. Set the configuration word's OFFSETMEAS bit to disconnect the Coulomb-counter input from the external circuitry and internally short it to AGND. Subtract the resulting offset current from succeeding measurements to correct for the internal offset. Clear OFFSETMEAS to resume normal operation. Note that since the Coulomb-counting circuitry is disconnected from the current-sense resistor during this measurement, currents that flow through the sense resistor when OFFSETMEAS is set do not increment the counters. Ensure that the command to measure the internal offset contains a low byte of 0xA (ODHI = OCHI = 1, ODLO = OCLO = 0) to force the FETs off and disconnect the load. Although the MAX1660 cannot perform its Coulomb-counting function while in offset-measurement mode, the overcurrent comparators are still active.
Layout Considerations
Use care during board layout to obtain the MAX1660's full precision over a wide range of input currents. Proper board layout minimizes the noise coupled to the analog sections from both high-current traces and digital switching. Use a star ground configuration and route the SCL and SDA lines away from CS and AGND. Lowpass filter the Coulomb-counter input by placing a 100 resistor between RCS and CS, and bypass CS to AGND with a 0.1F ceramic capacitor. To reduce leakage errors due to finite trace-to-trace resistance, place both filter components as close to the IC as possible. Use a Kelvin connection to obtain accurate measurements when large currents are flowing (Figure 11). Bypass REF to AGND with a 10nF ceramic capacitor placed as close to the IC as possible. Bypass VL to GND with a 0.33F capacitor, also placed as close to the IC as possible. Refer to the MAX1660 evaluation kit layout for an example of proper board layout.
17
Improving Measurement Accuracy
Filtering the Input Place a 100 resistor (R2) between RCS and the CS pin, and bypass CS to AGND with a 0.1F capacitor (C3), as shown in Figure 11. To minimize leakage errors due to finite trace-to-trace resistance, place both filter components, as well as C5, as close to the CS pin as possible. Minimizing SMBus Activity Although proper layout minimizes coupling from the digital data lines to the high-resolution analog interface, the MAX1660's analog interface may still detect switching noise in low-current, high-precision applications. In such applications, it may be advantageous to use the
*Patent pending
______________________________________________________________________________________
Digitally Controlled Fuel-Gauge Interface MAX1660*
WIDE, HIGH CURRENT TRACE
70nF R2 100 CURRENT-SENSE RESISTOR (RCS) C5 CS C3 0.1F AGND
MAX1660
MAIN CURRENT PATH
THIN, LOW CURRENT TRACES
GND WIDE, HIGH CURRENT TRACE
KELVIN CONNECTION REDUCES ERROR DUE TO TRACE RESISTANCE
SHORT, COMPACT PLACEMENT OF LOWPASS FILTER COMPONENTS REDUCES HIGH-FREQUENCY NOISE AND TRACE-TO-TRACE LEAKAGE ERROR.
Figure 11. Proper Layout for Current-Sense Input
Pin Configuration
TOP VIEW
INT 1 SHDN 2 N.C. 3 CS 4 AGND 5 REF 6 ODI 7 OCI 8 16 SCL 15 SDA 14 RST
___________________Chip Information
TRANSISTOR COUNT: 9078 SUBSTRATE CONNECTED TO GND
MAX1660
13 OCO 12 ODO 11 BATT 10 VL 9 GND
QSOP
*Patent pending 18 ______________________________________________________________________________________
Digitally Controlled Fuel-Gauge Interface
________________________________________________________Package Information
QSOP.EPS
MAX1660*
*Patent pending ______________________________________________________________________________________ 19
Digitally Controlled Fuel-Gauge Interface MAX1660*
NOTES
*Patent pending 20 ______________________________________________________________________________________

▲Up To Search▲

Price & Availability of MAX1660

	To Download MAX1660 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .